Motorola Selects Synopsys' System Studio and CDMA2000 Design Conformance Lab for System Analysis
Synopsys' System-Level Solution Enables Improved Algorithm
Exploration to Achieve Optimum Product Performance
MOUNTAIN VIEW, Calif.--(BUSINESS WIRE)--June 25, 2003--
Synopsys, Inc. (Nasdaq:SNPS), the world leader in integrated
circuit (IC) design software, today announced that Motorola's Global
Telecom Solutions Sector has chosen Synopsys' System Studio and the
Synopsys' CDMA2000(R) Design Conformance Lab for performance analysis
of Motorola's CDMA2000 system. Motorola used the Synopsys system-level
solution to simulate the CDMA2000 wireless system operation, assessing
critical product performance and helping reduce system design risk.
CDMA2000 is a third-generation wireless technology that is backward
compatible with the IS-95 wireless standard.
"Improving the performance in a wireless system has a big impact
on our ability to deliver solutions that enable our customers to
provide higher coverage and capacity," said Tony Goen, director of
engineering, Chandler Lab, at Motorola. "Synopsys' System Studio and
the CDMA2000 Design Conformance Lab helped us quantify and assess the
expected product performance much earlier in the product cycle than
previous methods."
Exploring wireless system performance requires accurate models of
the wireless standard and fast simulation for rapid design iterations
at the system level. The Design Conformance Lab contains models for
CDMA2000, including the EVDV and EVDO extensions, as well as
predefined scenarios for the analysis of standard conformance.
Motorola utilized System Studio's powerful modeling and analysis
capabilities to easily model their proprietary architecture design and
explore modem system performance in multiple CDMA2000 conformance
scenarios, thereby analyzing the behavior of the virtual prototype
before it was implemented.
"The combination of Synopsys' advanced system-level verification
tools and expert wireless knowledge enables our customers to produce
highly differentiated products," said Farhad Hayat, vice president of
marketing for Synopsys' Verification Technology Group. "With this
engagement, Motorola has extended its use of Synopsys' System Studio,
part of our Discovery(TM) Verification Platform, enabling reduced
cycle time and earlier visibility to potential design issues."
The Synopsys CDMA2000 libraries allowed Motorola to verify the
base station's system performance against the latest revision of the
3GPP2 standard and to complete important system-level simulations
within a few weeks after System Studio and the CDMA2000 Design
Conformance Lab were installed.
About Discovery Verification Platform
The Discovery Verification Platform is a unified environment that
provides high performance and efficiency of interaction among all
platform components, including mixed-HDL simulation, mixed signal,
system-level verification, assertions, verification intellectual
property, code coverage, functional coverage, testbenches and formal
analysis. The Discovery Verification Platform includes Synopsys'
VCS(TM) HDL simulator, VCS MX mixed-HDL simulator, System Studio for
system-level verification, LEDA(R) programmable RTL checker, Vera(R)
testbench automation tool, Magellan(TM) hybrid RTL formal
verification, DesignWare(R) verification IP, Formality(R) equivalence
checker, NanoSim(TM) and HSPICE(R) for mixed-signal simulation.
Combined with SystemVerilog and Synopsys' design-for-verification
methodology, the Discovery Verification Platform helps designers
achieve higher levels of verification productivity by contributing to
first-time silicon success within required project cycles.
About Synopsys
Synopsys, Inc. (Nasdaq:SNPS) is the world leader in electronic
design automation (EDA) software for integrated circuit (IC) design.
The company delivers technology-leading IC design and verification
platforms to the global electronics market, enabling the development
of complex systems-on-chips (SoCs). Synopsys also provides
intellectual property and design services to simplify the design
process and accelerate time-to-market for its customers. Synopsys is
headquartered in Mountain View, California and has offices in more
than 60 locations throughout North America, Europe, Japan and Asia.
Visit Synopsys online at http://www.synopsys.com/.
Synopsys, LEDA, Vera, DesignWare, Formality and HSPICE are
registered trademarks of Synopsys, Inc. Discovery, VCS, Magellan and
NanoSim are trademarks of Synopsys. All other trademarks or registered
trademarks mentioned in this release are the intellectual property of
their respective owners.
CONTACT: Synopsys, Inc.
Carole Murchison, 650/584-4632
carolem@synopsys.com
or
Edelman
Sarah Seifert, 650/429-2776
sarah.seifert@edelman.com
